Shift Register
The Shift Register is a digital delay line for binary data. On each clock pulse, data shifts from one stage to the next across 10 outputs.
Inputs
Section titled “Inputs”| Pin | Type | Description |
|---|---|---|
| Clock | Audio | Shifts data on rising edge |
| Input | Audio | Binary data input |
| Reset | Audio | Resets all stages to zero |
Outputs
Section titled “Outputs”| Pin | Type | Description |
|---|---|---|
| B0–B9 | Audio | 10 sequential outputs |